1. Field of the Invention
This invention relates to an integrated circuit (IC) device and, in particular, to an IC device of a BiMOS structure having a protective diode. Further, this invention is applied to an analog linear circuit operating at a VHF and UHF band in a high frequency region of 100 MHz to 800 MHz.
2. Description of the Related Art
FIG. 2 shows one form of circuit diagram showing a conventional IC device. The IC device includes a mixer as its portion. As evident from FIG. 2, a bipolar transistor and MOSFET for an MIS device are employed in the mixer. The emitter of the bipolar transistor is connected to the drain of a MOSFET (MOS field-effect transistor). In the device using such a bipolar transistor and MOSFET, a protective diode is usually connected between the source and the gate of the MOSFET so as to prevent a breakage of the MOSFET caused by an abnormal voltage applied to that gate.
FIG. 1 is a cross-sectional view showing a conventional semiconductor circuit device of a structure shown in FIG. 2. As evident from FIG. 1, a bipolar transistor and MOSFET are formed in and on a common semiconductor substrate. A first conductivity type epitaxial layer, that is, a second semiconductor layer 2 is deposited on the surface of a first conductivity type silicon semiconductor layer 1 that is, a semiconductor substrate and has an impurity concentration higher than that of the silicon semiconductor layer 1. Various parts are formed in and on the second semiconductor layer 2 to provide an IC (integrated circuit) device. The reason why the first semiconductor layer 1 is so formed as to have a lower impurity concentration than that of the first conductivity type second semiconductor layer 2 is that it is possible to reduce a capacitance between the collectors of bipolar transistors.
The semiconductor circuit device will be explained below in more detail. A buried area 3 is formed, by an ordinary method, at a predetermined place at a boundary between the first semiconductor layer 1 and a second semiconductor layer 2 and is of a second conductivity type having a high impurity concentration. That is, the N.sup.+ buried area 3 as set out above is completed by ion-implanting or diffusing Sb, a material exhibiting a second conductivity type, in the first semiconductor layer 1 at a predetermined place, depositing the second semiconductor layer 2 on the first semiconductor layer 1 and heat-treating the resultant structure to allow the Sb ion to be diffused in the first and second semiconductor layers at a predetermined place. A second conductivity type impurity is ion-implanted or diffused in the second semiconductor layer 2 at a location corresponding to the buried area 3 to provide a collector region 4 of a bipolar transistor and second conductivity type collector connection areas 5, 5 of low resistance.
A first conductivity type (P type) base region 6 is formed in a portion of the second conductivity type collector region 4 and a second conductivity type (N type) emitter region 8 is formed in the surface portion of the base region 6. It is to be noted that the second conductivity type emitter region 8 can be formed through the diffusion of impurities coming from an doped polycrystalline silicon layer 10 doped necessary impurities. A first conductivity type base connection area 7 of high impurity (P.sup.+) concentration is formed so as to lower an ohmic contact resistance and hence a base resistance. A molybdenum silicide layer 11 is provided on the doped polycrystalline silicon layer 10 and an Al electrode metal 20 is formed on the molybdenum silicide layer 11. The molybdenum silicide layer 11 permits ready connection to be made between the overlying Al electrode metal 20 and the doped polycrystalline silicon layer 10, enabling a connection resistance to be decreased and preventing a punch-through of aluminum. This type of bipolar transistor is well known in the art.
A MOSFET is formed adjacent the aforementioned bipolar transistor and a protective diode is monolithically formed adjacent the MOSFET. An isolation layer, that is, an LOCOS (local oxidation of silicon) layer 12 is provided between these devices.
A brief explanation of the aforementioned MOSFET being the same type as that of the known ones, will be given below.
Second conductivity type source and drain regions 14 and 15 are formed in the surface portions of the first conductivity type second semiconductor layer 2. A gate oxide layer 13 is formed on the surface of the second semiconductor layer 2 at an area corresponding to a channel region. A gate electrode 19 is provided on the gate oxide layer 13 and formed of a double layer comprised of a polycrystalline silicon layer 10 and molybdenum/silicide layer 11. A protective diode for preventing an electrostatic discharge damage of the gate oxide layer 13 for the MOSFET is constructed of second and third regions 17 and 18 of first conductivity type (P type) formed in a second conductivity type (N type) first region 16 and having a high impurity concentration, the first region 16 being formed on the surface portion of the first conductivity type second semiconductor layer 2.
Since the P.sup.+ type second region 17 and third regions 18 are provided in the N type first region to provide two diodes, these diodes are connected, cathode-to-cathode, in a series array. The second region 17 and third regions 18 are connected to the gate electrode 19 and source layer 14 in the MOSFET, respectively, as shown in FIG. 2, noting that this connection is not shown in FIG. 1. In this way, these two diodes are connected in parallel with a gate-to-source circuit of the MOSFET as shown in FIG. 2.
In order for the protective diode to exert no adverse effect on the operation of the MOSFET and to have an adequate protection capability for electrostatic discharge damage, the following characteristics are required for the protective diode:
(1) In order for the protective diode to exert no adverse effect on the normal operation of the MOSFET, the protective diode does not breakdown within a range of an input signal and has low leakage current.
(2) In order to prevent the damage of the MOSFET, the protective diode can breakdown with a smaller voltage than the breakdown voltage of the gate oxide layer.
That is, a breakdown voltage V.sub.R of the protective diode needs to satisfy the following condition EQU V.sub.i &lt;V.sub.R &lt;V.sub.P
where V.sub.i and V.sub.p represent the maximum value of an input signal and electrostatic breakdown voltage of the gate oxide layer, respectively. This is indicated in a graph shown in FIG. 5.
In order to satisfy the aforementioned condition, it is necessary to optimize the impurity concentration of the second conductivity type first region 1 and the depth X.sub.j of diffusion. It is, therefore, necessary that, in order to satisfy the condition (1), the diffusion depth X.sub.j be made considerably great to an extent exceeding 3 .mu.m. Since the second conductivity type first region 16 is formed through the ion implantation and diffusion process of the N type impurity, in order to set the diffusion depth X.sub.j to a level exceeding 3 .mu.m, heat treatment has to be performed at a high temperature for a prolonged period of time, for example, at a temperature of 1200.degree. C. for two hours. Since, with the thickness of the second conductivity type second semiconductor layer 2 conventionally set to be normally about 6 .mu.m, heat treatment of 2 to 3 hours was needed at a high temperature necessary to the ion implantation and diffusion processes for the formation of the collector region 4, even if the heat treatment was performed at a high temperature for a prolonged period of time in the formation of the second conductivity type first region 16 in the diode, no adverse effect has not been exerted on the characteristics of the bipolar transistors.
In the integrated circuit formed by the aforementioned method, it is possible to obtain a bipolar transistor whose gain band/width product f.sub.T is 2 to 4 GHz. It is important that, in order to improve the characteristic of the high frequency wave in the IC device, the bipolar transistor must be improved in terms of its characteristics. It is thus necessary, in the IC device shown in FIG. 2, to decrease the parasitic capacitance between the semiconductor structure and the collector region. It is also necessary to decrease the thickness of the first conductivity type second semiconductor layer. For the formation of a transistor of f.sub.T =7 to 10 GHz, the allowable thickness of the second semiconductor layer is of the order of 2 .mu.m.
With the second semiconductor layer smaller in thickness, for example, of the order of 2 .mu.m, the heat treatment for forming the collector region is conducted at a diffusion temperature of 1100.degree. C. for about 4 hours and, if this treatment exceeds that temperature, an impurity is thermally diffused from the second conductivity type buried area into the collector region and thus the impurity concentration of the collector region is increased, causing a fall in breakdown voltage and f.sub.T of the bipolar transistor. Since the second conductivity type first region of the diode is formed together with the collector region, the depth of a junction, X.sub.j, becomes about 1.2 .mu.m. Thus the breakdown voltage of the protective diode drops markedly down to 4 to 6 V, adversely affecting the normal operation of the MOSFET.